Taiwan Semiconductor Manufacturing Company, Ltd. extended its Open Innovation Platform with another focus on system-level design, analog/mixed-signal (AMS)/RF design and two-dimensional/three-dimensional integrated circuit (2-D/3-D IC) implementation. At the same time the company introduced the first three initiatives from the new focus. TSMC originally launched the Open Innovation Platform in 2008 as an industry-wide design enablement initiative. To date, the Open Innovation platform has accelerated time-to-market, improved return on design investment and reduced design infrastructure duplication. It includes a set of interoperable ecosystem interfaces, collaborative components and design flows that efficiently empower innovation throughout the supply chain thereby enabling creation and sharing of newly-created revenue and profitability. For example, iPDK, iDRC, iLVS, iRCX, Digital Reference Flow, Integrated Signoff Flow and RF Reference Design Kit are all in production use today.

Mentor Graphics Corp. will continue to deliver comprehensive support for the Open Verification Methodology (OVM), and is extending that same level of support for the Universal Verification Methodology (UVM). Key technologies that support OVM and have been extended to support UVM include the Questa advanced verification platform, the Questa Multi-view Verification Components library and the Veloce emulation platform.

Synopsys, Inc. today announced the open source availability of its widely used Interconnect Technology Format (ITF) for parasitic modeling and the formation of a technical advisory board (TAB) under the auspices of IEEE Industry Standards and Technology Organization (IEEE-ISTO). The purpose of the Interconnect Modeling TAB (IMTAB) is to facilitate the evolution of ITF and promote an interoperable interconnect modeling format to address the industry's advancing process technology and design needs.

EVE today announced that STMicroelectronics, a world leader in set-top box and digital TV chips, has adopted the ZeBu emulation system, including EVE's extensive catalog of ZeBu transactors and memory models, for use in the development of 3D graphics and advanced video codec technologies.

It is time to gather the questions, make the list, fix the appointments and otherwise get ready to go to Disneyland. Oh sorry, my GPS was off by 300 meters. It is time for DAC whose exhibits size and number of collocated events require a big convention hall to be reserved so much in advance that it takes a clairvoyant to figure out where to locate the conference. After this year, DAC will bounce between San Diego and San Francisco, without declaring any official affiliation to religions that canonize its members. Anaheim is almost half way between Los Angeles and San Diego, and the number of EDA customers in both locations is quite high. There will be interesting things to see, hear, and attend. So do not be discouraged, come and have a good time.

Mentor Graphics Corporation has released a Rad-tolerant version of its Precision FPGA design solution: Precision Rad-Tolerant FPGA design solution for aerospace and high-reliability applications. The product, developed with NASA's guidance, introduces an industry-first, synthesis-based radiation effects mitigation solution to reduce the risk of functionality problems including soft errors caused by single event upset (SEU) and single event transient (SET) disruptions. Initial support is available for SRAM, anti-fuse, and flash-based devices from Actel® and Xilinx®.

The Open SystemC Initiative (OSCI) announces the next North American SystemC User’s Group (NASCUG) meeting. Co-located with the 2010 Design Automation Conference (DAC), the event is free to industry professionals and the media with advance registration at: www.mod-marketing.com/osci/.

Jasper Design Automation has introduced a new versions of ActiveDesign and JasperGold with capabilities that bridge the divide between chip design and verification by sharing a common, persistent knowledge base.

Mentor Graphics Corporation today announced that its FloEFDT Pro v9.3.1 Concurrent Computational Fluid Dynamics (CFD) technology is the industry's first fully-embedded solution for PTC Pro/ENGINEER software. Pro/ENGINEER is the 3D product design standard used by mechanical design engineers, providing integrated parametric 3D CAD/CAM/CAE capabilities to allow users to maximize productivity and develop innovative products.

Tanner EDA, the catalyst for innovation for the design, layout and verification of analog and mixed-signal integrated circuits (ICs), will hold its first User Forum on Thursday, June 17, at DAC 2010 in Anaheim, California. Tanner EDA has a “less is more” approach to tool design, believing that engineers need the right mix of top-notch features and functionality, squarely aligned with requirements, to accelerate the design process. This concept of elegant, efficient solutions – achieving productivity gains with just the right, and only the right, tools -- is the focus of the event, which brings together current and prospective customers from Tanner EDA’s 5,000-strong user base to exchange ideas and techniques.