Amy Clements wrote the latest Zuken blog reporting on an analysis of the E3 series electrical CAD software. Jason Brett, who teaches electronics and material sciences in the Technology Teacher Education Program at the British Columbia Institute of Technology is the reviewer.
You can read the details by following the link in the Zuken box on the right.
The Blue Pearl Software Suite works with the Xilinx Vivado Design Suite running on Windows platforms. It includes linting, CDC analysis and automatic SDC generation. Its generated SDCs automate the synthesis and place and route phases of FPGA design implementation, and reduce iterations and overall design time. Its Visual Verification Environment makes it easy to use.
Zuken is not a frequently mentioned when I ask people in the industry to give me names of companies that are at the leading edge of our technology. Yet the company is a major player in the PCB market, second only to Mentor according to Gary Smith. The reason for this lack of knowledge rests, I believe, in the nature of the company. Zuken is a Japanese company with major research and development assets in Germany as well. This, I believe, justifies the reserved approach to the market. Zuken does not promote itself with the high profile events of its competitors.
Continuing its tradition of promoting and recognizing printed circuit board (PCB) design excellence, Mentor Graphics Corporation announced winners of its PCB Technology Leadership Awards. Started in 1988, this program is the longest running competition of its kind in the electronic design automation (EDA) industry. It recognizes engineers and designers who use innovative methods and design tools to address today’s complex PCB systems design challenges and produce industry-leading products.
During the last few days, I have received a number of press releases from both Cadence and Synopsys dealing with their work with TSMC on the 20 nm process. It then makes sense for me to hear from Mentor Graphics as well. Their news, unlike their two direct competitors, did not specifically focus on 3D-IC technology, although a tweet from Dennis Brophy chirped about it, but instead deals with a broad range of tools.
Although both CEDA and EDAC have tried to put a positive spin to this change, this is another sign of the significant transformation of the EDA industry. Moving the Phil Kaufman award to Sunday evening at DAC is like taking two aspirins and calling the doctor in the morning.
Last week I wrote that TSMC had validated Synopsys' design flow on its 3D-IC process. Today I received a press release from Cadence stating fundamentally the same thing with regard to its design flow. It is clear that work on 20 nm processes is intensifying as a way to justify the significant investment required by system companies to use it.
May be you think the 3D-IC pace of development is too slow, but I am of the opposite point of view. Synopsys announced that it is delivering a comprehensive 3D-IC design solution that is included in TSMC's CoWoS™ (Chip on Wafer on Substrate) Reference Flow.
Zuken Innovation World in Newport Beach is just days away, but there is still time to register!
October 15-17, 2012
Hyatt Regency Newport Beach
You can register here
The conference includes two full days of presentations from Zuken experts, partners and customers.
• North America Power Utility implementation of E³.series (Hydro-Québec)
• World-class Silicon & Development Tools for Intelligent Embedded Connected Devices (Intel Corporation)
Kilopass Technology announced Gusto-2, its second generation of code storage products, to serve the increasing numbers of new system-on-chip (SoC) designs for instant-on mobile devices. Gusto-2 is available for SoC designs targeted for 2013 Q1 fabrication. It will initially be enabled on the 55nm and 65nm logic processes at IDMs and mainstream pure play foundries with enablement on smaller process nodes following.