Synopsys Introduces Discovery 2009

Platform Encompasses New Multicore Simulation Performance, Native Design Checks, Comprehensive Low Power Verification Capabilities, and CustomSim Unified Circuit Simulation Solution.

Not one to sit on its laurels, after all they are meant to be worn on one's head, Synopsys, the leading EDA industry company, has introduced a new version of its Discovery Verification platform, an integrated verification solution for analog/mixed-signal and digital designs, that contains significant improvements.

Discovery 2009 delivers improved verification productivity with new multicore simulation technologies, native design checks and comprehensive low power verification capabilities throughout the platform. The multicore simulation technologies being introduced today with the VCS functional verification and CustomSim unified circuit simulation solutions deliver up to four times faster verification than previous solutions, according to Steve Smith, Senior Director, Platform Marketing.

In March 2008, Synopsys announced a multicore initiative to deploy advanced parallel, threaded and other optimized compute technologies across its verification and implementation and manufacturing platforms to reduce time-to-results. VCS multicore technology removes typical verification bottlenecks associated with interactive simulations and long-running tests by parallelizing tasks such as simulation, coverage, assertions and debug across multiple processor cores. The new CustomSim unified circuit simulation solution integrates circuit simulation technologies with new multicore capabilities in a single, highly-accurate verification solution. VCS and CustomSim are tightly integrated via Direct Kernel Integration (DKI) for high-performance mixed-signal simulation.

Discovery 2009 incorporates comprehensive low-power verification capabilities at multiple levels of abstraction, from RTL to transistor level. VCS with MVSIM delivers voltage-aware RTL and gate-level simulation, automated assertions, and comprehensive verification coverage as defined in the new Verification Methodology Manual for Low Power book. CustomSim verifies power management designs at the transistor level by identifying IR drop, electromigration and standby leakage issues that can impact the reliability and performance of integrated circuits.

With this release VCS users have the choice of checking their designs with custom assertions or using VCS Assertion IP for use with standard protocols, including OCP, AXI, USB and PCI. With the introduction of CustomSim, Synopsys is extending native design checking to the AMS verification domain. CustomSim provides a set of static and dynamic rule-based circuit checks such as power-down floating gates, missing level shifters, gate-oxide breakdown and forward-biased bulk diodes. More information can be obtained by visiting the Synopsys web site.