My previous article on the 2005 financial results of the EDA industry as reported by the EDAC Market Statistics Service (MSS) looked at EDA revenues at the macro level, as they relate to the electronics industry financial performance. If you missed it you can read it here.

For your convenience, here is the “executive summary” of the article. Volume production of semiconductor devices, whether they are standard parts, ASIC, or FPGA, have no direct impact on EDA revenue. Even the development of new printed circuit boards are not due to volume production of semiconductors, since it is only the development of new components that are designed into the PCB that prompts PCB designers to either renew or purchase more licenses. The same goes for semiconductors. Only new designs generate direct EDA revenues. So trying to directly compare EDA revenue to semiconductor revenue makes little sense.

It is true, though, that the semiconductor industry is the prime motive for the existence of EDA, and it is also true that a healthy semiconductor industry is an indicator of the potential well being of EDA. So growth in the semiconductor industry means that the EDA industry has had a good year one or two years before when the licenses to develop those parts were first purchased, and a sustained semiconductor revenue year to year is a hopeful indicator that EDA customers are making profits and may be willing to spend some of them to develop new products.

The two most important market segments in the report are: Computer-Aided Engineering and IC Physical Design and Verification. The first one includes two markets that, according to Dataquest, should have seen significant growth year-to-year, namely ESL and Formal Verification, and the latter includes tools for Design for Manufacturing (DFM), Design for Test (DFT), and Design for Yield (DFY), in other word, all the DFx segments that the various marketing organizations have told us are essential for the successful development of a leading edge integrated circuit.

Gary Smith at Dataquest has been covering ESL since 1994 and has shown the patience of a true connoisseur of good wine in giving it the time to ripen, ferment, and develop the promised and eagerly expected bouquet and nose its roots have promised. Gary thinks that ESL will be the market segment that will provide the significant financial growth the industry has been looking for since the turn of the century. The CAE sector revenue for 2005 was flat compared to 2004, and ESL has not lived up to expectations.

In retrospect we botched the definition and the formation of the market. We limited its potential by stubbornly refusing to admit that, in most cases, the electronic system is only a subsystem of a product, thus limiting our potential market, and we mishandled its formation by introducing the wrong type of products at the beginning of its existence. I still remember a conversation I had while still at VeriBest, with Aart de Geus. I asked him why not take the opportunity and expand the role of EDA to cover software development and multi-discipline product development as a way to grow EDA revenues through system level design. His answer was short: “We do not want to enter those markets because we know nothing about them. We must stick to solve those problems we are familiar with.” It is a reasonable cautious attitude for the CEO of a multi-billion dollar company, but not one that I had expected from the creator of the synthesis market. I was both surprised and disappointed especially because Synopsys had just introduced SystemC and had assumed the leading role in the ESL space. Synopsys chose the C environment because embedded software developers write in C most often and because practically everyone that graduates from an electronic engineering school knows C. It turned out that both assumptions, although true, have led us into trouble and significantly slowed the growth of the market. Engineers are comfortable in a multi-language world and do not need a single language, just well defined communication and integration protocols between two languages. And, even more importantly, there was no synthesis product supporting SystemC. It also turned out that much of the work done with SystemC could be done using public domain tools. System companies like that: look ma, no money!

To Synopsys’ credit it eventually recognized its mistake and has now put the majority of its ESL marketing effort behind SystemVerilog, and the latter is too new a tool to have made a measurable impact to the growth of CAE revenues. Next year will tell, but if EDAC would allow me one piece of advice it is this: send your best ambassador to Natick, MA and offer The Mathworks a free life membership. Companies in the ESL space have lots to learn from the stealth giant in this market segment.

The IC Physical Design and Verification market segment revenue for 2005 are 4% higher than in 2004. This is also a disappointing result, but not, as some of my colleagues have written, due to ineptitude on the part of the CEOs of the four leading EDA vendors, but due to market realities we do not control. The number of EDA customers that use the latest semiconductor processes and thus require the latest back-end tools is diminishing, due to both increasing development and manufacturing costs for processes below 100 nm and the fact that competitive requirements for most consumer electronics products can be met using processes between 250 and 130 nm. Cadence Design was the first one to recognize this fact last year, and instituted a marketing and sales program that segments its products according to the needs of customers using different process technologies. When Cadence announced the program I worried about the difficulties inherent in managing a segmented product inventory. I must admit I was wrong: so far it looks like Cadence’s management has been successful in implementing its program. Unfortunately this segmentation can only increase their market share in the lower end segments and could even decrease total EDA revenue. The backend segment of the market is also suffering from confusion. Any logical person would have to question labels like: DFM, DFT, and DFY. Why would anyone develop a product if not in order to manufacture it? And everyone would like to test the product once manufactured, wouldn’t you think? And manufacturing something that either does not yield or has un-economical yields would also not be very shrewd. So, I think the various DFx terms are ill conceived, confusing, and fragment the market with point tools that are difficult to integrate, often poorly supported, and promoted with out-of-focus messages. The industry needs only one DF program: it is DFP, as I said more than once in the pages of EDN. It stands for Design For Profit.

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