Last week I attend the “CDN LIVE” Event at the Santa Clara Convention Center and the adjoining Westin Hotel. As most of you know since I do not live in Silicon Valley, attending such an event requires some planning and investment on my part. I had decided to attend for two reasons: the rumor that such an event was Cadence’s first attempt to replace its presence at DAC with such a function, and the perception that this was something new. Having attended the event I can now say that I believe the rumors to be unfounded and my perception to be wrong. “CDN LIVE” Is nothing more than a cleverly packaged users group get together, and thus the attendees are Cadence customers (about 450 this time), with a shrinking numbers of financial analysts and press editors in tow. The diminishing numbers are not the result of a lack of interest, but of layoffs and much tighter budgets. The event offered an exhibitors floor that was open for four hours and forty-five minutes on Monday, between 12:00 and 1:45 (the lunch break) and 4:30 to 7:30 (the cocktails and heavy appetizers break). There were about thirty EDA and semiconductors vendors, mostly with 10X10 “curtains and table” booths, although both ARM and TSMC had self standing booths. In case I forgot any other vendors with self- standing booth please accept my apologies. You may also use my memory as a meter of the success of your marketing efforts…

The technical program was divided into six tracks and the presentations I attended were well done, a credit to the Program Committee. The reason I believe such an event will not replace Cadence participation at DAC is the make-up of the attendees. They are Cadence customers, not outsiders that might become Cadence customers: there was no outreach mechanism, especially since the exhibitors’ portion of the event provided good food and drinks but no new EDA product. If Cadence wants to tell its story to an audience wider than its own customers, and I think it does and it needs to, they will be at DAC, even if in order to eat and drink the best of its offerings I will have to attend its Users Group meeting once a year.

Cadence took the opportunity to make a couple of announcements during the event, as well as schedule three keynote speeches. The most effective speaker by far was Bernard Meyerson, Vice President and Chief Technologist, Systems & Technology Group, IBM. Bernie fundamentally repeated his sermon about Scaling being dead for some time now. Having heard it, in different forms, three times now, I can distill his speech into two words: POWER KILLS. You can apply this to a number of fields, including electronics design. Mike Fister, President and CEO of Cadence gave an overview of the products and policies announcements, which I will cover in more details below. The presentation by Mark Edelstone, Managing Director and Global Leader for Semiconductor Research, Morgan Stanley presented a lot of interesting data about the semiconductor industry. Mr. Edelstone interpreted the data for the audience: of course the problem with that data is that you can interpret it in a number of ways and still be within three sigma of reality.

During a session reserved to financial analysts and industry editors, Cadence made two announcements. It introduced three Methodology Kits targeting analog mixed signal designers of wireless, wired and consumer electronics devices. Each kit is based upon the Virtuoso custom design platform with links to the Encounter digital IC platform and the Incisive functional verification platform. The components of each kit address key productivity challenges such as: fragmented analog, digital and verification design processes; parasitic effects in AMS; multiple power supplies; and design migration and reuse. This announcement is important not for the introduction of the kits, but for the business implication each kit offers. If marketed correctly, each kit offers to Cadence the opportunity to play the role of “general contractor” in the development of a product under the applicability umbrella of the kit. The kit environment provides a structure that allows the other parties involved in the product development, like the foundry, the IC package designer, the library developers, and the IP providers to integrate their contributions in a predictable and economically efficient manner. If such a role is achieved, it can become an incremental source of revenues for Cadence.

I was not as favorably impressed by the second announcement: Cadence attempt to market segmentation, starting with the Encounter platform. Customers are being offered two versions of the platform: L and XL. These two are soon to be joined by the GXL version. Cadence’s description of the product differentiation was a bit vague: the L is for design less than 5 million gates and produced at 130 nm or larger features size, the XL targets the 90 nm process with more gate capacity and the GXL should be used by those customers targeting 65 nm and beyond. But, when asked for a precise decision point that could be used to choose one or another, Cadence’s personnel became vague. What seems to be clear is that the L version could be used in conjunction with the XL version to give an engineering group more computing power while at the same time lowering license prices somewhat. My experience with product layering has never been very satisfactory unless it is accompanied by a clear diversification in the sales organization. This is due to the well known quota effect, whereby a salesperson always sells the version that contributes the most to his/her quota figures, regardless of the actual need profile of the customer. May be Cadence will end up selling the L version only on the web, since this category of customers require less support. By reducing both the cost of sales and support, Cadence could in fact continue to generate interesting revenues from a technology approaching “end-of-life”. But this is my take, not Cadence’s plan. What they shared was that the same sales and support organization dedicated to the XL and GXL product packaging will also be responsible for the L line. In case you did not yet get the message let me be specific: I think this is a mistake.

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