Northwest Logic and Aldec, Inc. announce that they have verified full compatibility between Northwest Logic's Intellectual Property (IP) Cores and Aldec's RTL Simulators. Northwest Logic is a provider of high-performance, easy-to-use IP Cores, including DDR3/2, PCIe 3.0/2.0/1.1 and MIPI IP Cores. Aldec is a leading provider of RTL and gate-level mixed language Simulators, including Aldec Riviera-PRO™ 2010.06 and Active-HDL 8.3 RTL Simulators.

"Northwest Logic's mission is to ensure its customers have the broadest possible development options. We have verified our IP Cores are fully compatible with Aldec's RTL Simulators. During this process we found the Aldec tools to be full featured, high-performance and well supported," said Brian Daellenbach, President of Northwest Logic.

Aldec HDL Simulators, Active-HDL™ and Riviera-PRO™ offer a complete verification environment, including design creation, high-performance RTL and gate-level simulation, including our high-speed mixed-language simulation engine, supporting VHDL, Verilog®, SystemVerilog and SystemC/C/C++. Aldec HDL Simulators feature optimal waveform toolsets, ultra-fast debugging tools, code coverage and the most Advanced Verification Inside, such as ESL, TLM, OVM/UVM and Assertion-Based Verification (ABV), SVA assertions, PSL and cover statements. Download a 20-day evaluation version at this site.

"Customers looking for high-performance IP solutions for their next-generation designs will benefit from Northwest Logic's industry-leading IP solutions used in conjunction with Aldec's feature-rich, optimal-performance RTL Simulators," said Lori Nguyen, Marketing Director of Aldec, Inc.