At 28 nm and below, certain patterns that reduce semiconductor yield are difficult to describe in process rules and are typically addressed using time-consuming and costly lithography process simulations. The pattern matching approach offers a faster, cheaper and comparably accurate alternative. Magma Design Automation announced that the new pattern matching capability in the Quartz™ DRC physical verification product has been qualified to support DRC+, GLOBALFOUNDRIES' silicon-validated, yield-critical pattern-based design for manufacturing (DFM) verification flow for all advanced process technologies, including 40 nanometer (nm), 28 nm and below.

The new capability will allow Magma’s and GLOBALFOUNDRIES’ mutual customers to significantly accelerate – up to 3 to 4 orders of magnitude – the identification of 2-dimensional (2D) yield detractors and complex manufacturing issues with comparable accuracy to full-chip lithography process simulations. Tight integration of Quartz DRC with Magma’s Talus® RTL-to-GDSII platform fully automates fixing and enables fast and easy deployment of an efficient and convergent analyze-and-repair methodology.
Magma’s pattern matching solution leverages the tight integration of the Talus RTL-to-GDSII platform and the superfast Quartz DRC physical verification products to accelerate and automate the process. Using GLOBALFOUNDRIES’ DRC+ pattern database, Quartz DRC’s pattern matching engine locates the yield-critical patterns and then Talus automatically fixes the problematic patterns using its efficient routing engine. The Quartz DRC pattern-matching capability features a flexible user interface based on Tcl 8.5, making it easy to add new problematic patterns to the library. The pattern-matching engine is fully integrated within Magma’s existing Quartz DRC and Talus qDRC flow making it is very easy for existing users to adopt.