Kilopass Technology Has described at MemCon in Santa Clara, Calif., its new embedded VCM (Vertical Cross-point Memory) NVM IP bit cell. The new VCM bit cell quadruples the density of today’s anti-fuse NVM IP bit cell. The VCM bit cell will make possible program storage where today’s embedded non-volatile memory (eNVM) technology is cost-prohibitive or unavailable at capacities of 4Mb to 32Mb. It will also enable a higher level of performance more similar to SRAM compared to existing slower eNVM technologies or external flash or EEPROM chips.
eNVM is a method to store permanent data or software onto a standard chip using the industry-standard CMOS logic manufacturing process. The integration of eNVM helps to reduce cost, footprint, and power of the chip. However, until now eNVM has been limited to a 2Mb upper limit of capacity and limited erase cycles, also known as endurance. With the VCM bit cell technology, Kilopass will dramatically scale this limit to 32Mb with capability to scale beyond, thus providing more endurance.
About The VCM Bit Cell Technology
The VCM bit cell technology differs from that of the current Kilopass NVM IP, which requires a lateral selection transistor in planar (X-Y) directions to form memory bits. The VCM bit cell technology uses one single P-MOS transistor to both store and control the memory content. This compaction method reduces the footprint of the single bit cell from about 75 F2 for Kilopass’ current XPM memory to 12 F2 for VCM memory, where each F describes a manufacturable feature (like for example 90 nm or 65 nm). By comparison, a typical embedded flash memory has an area of about 50 F2, and the state-of-the-art NAND flash bit cell with a fully customized memory process technology and extra cost can only achieve 6F2, about half of the area of the VCM bit cell. The VCM bit cell is the densest eNVM that exists in standard logic process.
VCM bit cell technology does require a simple added processing step/mask, but needs no new materials, equipment, or additional thermal cycles. An additional relatively coarse grade mask is used, which is inexpensive and easy to manufacture. Indeed, the VCM bit cell memory technology has been designed into a 110nm analog/mixed signal process in three different test shuttles with successful results. VCM bit cell technology is currently ready to be integrated into the upcoming Numera product in early 2013.
The VCM bit cell memory technology fills an eNVM void not addressed by external components such as serial-flash/EEPROM, Read-only Memory (ROM), and embedded flash (eFlash).
Today’s external serial EEPROM or serial Flash with an on-chip shadow SRAM is untenable because of power and cost constraints. The Embedded flash alternative is not available at process nodes below 65nm and, even when available, may add too much cost to a predominantly logic SoC. The read-only memory (mask-ROM) alternative comes with the drawback of having to be configured during design and any program change requiring an expensive and lengthy design re-spin. The VCM bit cell provides an attractive alternative to all three of these solutions that overcomes their shortcomings. It reduces the bill of materials cost and logistics requirement of an external EEPROM and replaces the associated embedded shadow SRAM function in an equivalent silicon area. The memory is a small fraction of the cost of embedded EEPROM or flash and is built on Kilopass’ proven, scalable, anti-fuse technology foundation. It adds the flexibility not possible with ROM of being programmable at final test and reprogrammable in the field if program changes are required.
Kilopass will initially target the ultra-low power, high-integration wireless devices built in 55nm to 40nm technologies, where the MCU-like SOC requires extended battery life, small form factor, and execute-in-place performance, all ideal for the VCM bit cell technology. In addition, these devices often require different software versions and updates, which make the VCM memory technology superior to mask-based memory like ROM.