The fact that advanced semiconductor processes require closer relationships between the foundry and the IP provider found further confirmation with Freescale licensing of Synopsys' IP portfolio for SoC designs. Although it is likely that the agreement will benefit designers targeting the 40nm process, it makes much more viable using the 32 and 20 nm processes. It is becoming obvious that at 20 nm designers will have to use only IP that has been pre-certified by the foundry.

The multi-year agreement gives Freescale access to Synopsys' broad portfolio of DesignWare interface and analog IP such as USB, HDMI, PCI Express®, SATA, and MIPI interfaces, as well as data converters, audio codecs and video front -ends. Synopsys' established leadership in delivering high-quality IP that supports the most widely used interfaces and advanced processes combined with an expert worldwide technical support team enables Freescale to reduce risk and speed time-to-market for their semiconductor designs.
"Access to Synopsys' very broad IP portfolio helps us keep pace with the complexities of new standard interfaces and migration to ultra-deep sub-micron processes," said Ken Hansen senior fellow, vice president and chief technology officer at Freescale Semiconductor. "Freescale has chosen Synopsys because of its robust architectures, protocol certification record, extensive silicon validation process and worldwide support teams that are located near our key design centers. This will enable our designers to focus their efforts on delivering differentiated products to the market."
"Synopsys' collaboration with Freescale has resulted in the successful development of SoCs for a range of applications, and we look forward to continuing this close relationship," said John Koeter, vice president of marketing for the Solutions Group at Synopsys. "As the industry's trusted IP partner, Synopsys provides a broad portfolio of silicon-proven, IP solutions that help customers such as Freescale integrate critical functionality into their SoCs with less risk and improved time-to-market."