EVE today announced a variety of new software to expand the capabilities of its ZeBu system-on-chip (SoC) emulation platform, including power-aware verification, post-run debugging, two vertical application validation platforms, low-power and Flash memory models, and electronic system level (ESL) tool interfaces. "Today's emulation platforms have evolved into complex verification environments to address hardware/software integration and embedded software validation of large designs," remarks Luc Burgun, EVE's chief executive officer and president.

A new power-aware verification package for ZeBu enables functional verification of power switching in low-power designs. Power islands can be turned on/off dynamically to ensure that power switching does not adversely affect a design's functional integrity. The first release shipping now supports the Unified Power Format (UPF) standard.

The ZeBu Smart debug methodology has been enhanced with a new post-run debug capability that provides a deterministic methodology for tracing complex bugs. In a ZeBu emulation run, the entire state of the SoC emulation environment is captured in "frames," including the design configuration, design under test (DUT) register and memory states, and the corresponding input stimulus to the DUT.

Post-run debug is particularly valuable when problems are identified deep in a long test run or when problem scenarios are difficult to re-create. With post-run debug features, once a problem is identified, the designer has a mechanism to quickly debug it. With the collected data, a debug run can be initiated at any point, and the captured stimulus can be applied to re-create a problem scenario, eliminating the need to start from the beginning of a long test sequence.

Additionally, EVE is unveiling new transaction-level interfaces to leading electronic system level (ESL) software. These links enable a high-performance, hybrid virtual development environment where software integrated development environments (IDEs) are used to debug software executing on ESL virtual platforms with the available RTL code being run and debugged at accelerated emulation speeds in ZeBu. For leading-edge designs, which typically include 50% or more RTL reuse, engineers can access the more accurate, hybrid hardware/software co-verification environment early in the project and identify timing-related issues not found in a pure ESL virtual platform.

EVE Unveils 10-Gigabit Ethernet Validation Platform

The company has also expanded its library of ZeBu vertical application validation platforms, now exceeding 30 transactors, virtual bridges and ICE speed-rate adapters to easily integrate ZeBu-emulated SoC designs with system-level verification and validation environments The e-zTest PCIe Gen 3 validation platform with up to 16 lanes of support, including a PCIe frame Viewer for debug. The ZeBu memory model catalog includes the latest low-power and Flash memory models.

The 10-Gigabit Ethernet (10GbE) validation platform for its ZeBu (Zero Bugs) family of system-on-chip (SoC) hardware-assisted verification platforms is the latest addition to the library. The e-zTest 10GbE software is a transaction-based environment for high-speed validation of 10GbE functions in network routers, switches and controllers, and SoC application specific integrated circuits (ASICs) containing 10GbE ports.

e-zTest 10GbE supports half- and full-duplex modes, variable frame lengths and inter-frame gap modeling. Application programming interfaces allow easy integration with user testbenches as well as commercial Ethernet test generation and protocol analysis applications. The e-zTest 10GbE frame monitoring and capture environment allows exporting frames in Packet Capture (PCAP) format, and is compatible with the open source Wireshark toolkit for network packet analysis. PCAP files also support Ethernet frame generators such as packETH and Tcpreplay to stimulate the design under test (DUT) deterministically using captured network traffic.

EVE provides accelerated SoC transaction-based verification for hardware and software developers who access ZeBu as a network resource to leading semiconductor, communications, video, and portable and stationary consumer product companies. ZeBu provides a library of off-the-shelf, synthesizable emulation virtual components to debug GbE, 10GbE, PCIe, USB, video/HDMI, I2C, I2S and AMBA protocols and integration with virtual platform development environments for pre-silicon software development. EVE’s ZEMI-3 product generates custom, synthesizable transactors for user custom protocols. The technology and method was successfully used by Fujitsu Microelectronics Solutions to implement an integrated algorithmic C verification to RTL emulation flow for its HLS design methodology.

Typical projects achieve verification speeds that range from five-to-15 MegaHertz with ZeBu-Blade2 and ZeBu-Server. With Smart Debug, ZeBu provides 100% accessibility into the device under test and a hierarchical debug methodology to trace problems.