Calypto PowerPro Adopted by Core Logic for Advanced RTL Power Reduction

Calypto® Design Systems announced that Core Logic Inc., a fabless semiconductor manufacturer, has adopted PowerPro CG as their primary power optimization tool for designing their complex system-on-chip (SoC) products.

Core Logic develops competitive SoC products and various platforms for mobile, home and automotive applications. Choosing Calypto’s PowerPro CG tool was an easy decision for them because PowerPro CG delivered the automation and quality of results that garnered 30% savings in overall project time. The savings in project time helps them remain competitive while delivering exceptional value to their customers.

Based on Calypto’s patented sequential analysis technology, PowerPro CG reduces power by up to 60% with little or no impact on timing or area. PowerPro CG reads in an RTL design and evaluates circuit behavior across multiple clock cycles to identify sequential clock gating enable conditions. PowerPro CG then generates new low-power RTL that looks identical to the original RTL with the addition of sequential clock gating logic.
The PowerPro CG-generated RTL is comprehensively verified with Calypto’s SLEC Pro. SLEC Pro is a sequential logic equivalence checking tool that guarantees functional equivalence between the PowerPro CG-generated RTL and the original RTL. No other solution provides this combination of automatic RTL power optimization and formal verification.