Cadence Expands NAND Flash Design IP Offering With ONFI 3 PHY and Controller

It is undeniable that as software gains a larger role in system design and implementation high speed memory will become essential. But the memory block itself must be supported with the highest possible data transfer rate or a bottleneck occurs and advances in memory structure become irrelevant. I have been waiting for a signal from Cadence that its acquisition of Denali would add a significant contribution to the bottom line. Today's announcement is such proof. Cadence has brought together IP modeling, IP construction, and IP verification all in an offering that allows designers to take full advantage of the leading standard in data transmission protocol.

Leveraging its experience in the Flash IP market, Cadence Design Systems announced it has expanded its Flash IP offering to include support for the Open NAND Flash Interface (ONFI) 3.0 specification. Cadence is the first company to provide a combined ONFI 3 controller and PHY IP solution, significantly streamlining SoC and system design while ensuring an optimized ONFI 3 implementation for maximum performance. Cadence Flash IP, including the broad portfolio of Denali IP acquired in 2010, has now been implemented by over 40 customers worldwide.

The ONFI 3 specification simplifies the design of high-performance computing platforms, such as solid state drives and enterprise storage solutions; and consumer devices, such as tablets and smartphones that integrate NAND Flash memory. The new specification defines speeds of up to 400 mega-transfers per second. In addition to the new ONFI 3 specification, the Cadence Flash and controller IP also support the Toggle 2.0 specification.

The Cadence controller and PHY IP implement advanced capabilities of the standard including chip-enable interleaving, which results in significantly improved system performance when dealing with multiple flash devices, as has become common in high-end mobile devices and SSDs. As a result, the IP can deliver up to 95 percent of a NAND device's theoretical maximum throughput. Cadence implements sophisticated, highly configurable error correction techniques to further enhance performance and deliver enterprise class reliability. Delivering advanced configurability, low-power capabilities and support for system boot from NAND, the Cadence solution is scalable from mobile applications to the data center.