Altera Corporation announced a new low-power FPGA family with security features. The Cyclone III LS FPGAs offer high logic, memory, and DSP density per board area. The Cyclone III LS FPGAs, which are shipping now, target power and board-space-sensitive applications in all market segments including military and industrial.

These devices at less than 0.25W of static power for 200K logic elements (LEs). The security features of the Cyclone III LS FPGA include a comprehensive information-assurance design suite that offers anti-tamper, design-security and design-separation capabilities. To protect highly sensitive information, the Cyclone III LS FPGAs' anti-tamper features include JTAG port protection, tamper monitoring, and cyclical redundancy check (CRC). Offering another layer of protection, these devices feature a proven industry-standard AES 256-bit encryption key for design security. Where size, weight, and power (SWaP) requirements are crucial, the design-separation feature of the Cyclone III LS FPGA enables high-assurance and industrial-safety applications in a single chip through logic, routing and I/O bank separation.

Cyclone III LS FPGAs allow a single-chip solution for next-generation military applications such as software-defined radio (SDR), crypto-subsystems, and crypto modernization equipment where long battery life, density at the lowest power, and small board space are required. The additional security features of the Cyclone III LS FPGAs give designers of secure communications applications the assurance that their information will be protected with anti-tamper technology.

The features of the Cyclone III LS FPGA also provide the optimal solution for industrial applications, specifically motion control, Industrial Ethernet, and industrial safety. Using the design-separation feature lowers system power and increases integration while offering design redundancy for safety-critical applications. For detailed information on these new devices, see www.altera.com/pr/cycloneiii.