FPGA

Latest Synopsys FPGA-Based Prototyping Tool Released

Synopsys announced updates to its Identify and Certify FPGA-based prototyping tools. Algorithm advancements in the latest Certify software release produce up to 30 percent faster FPGA-to-FPGA transmission performance using High-Speed Time Domain Multiplexing (HSTDM), which results in higher overall performance of designs prototyped with Synopsys' HAPS FPGA-based prototyping systems.

Synopsys Enhances Synplify FPGA Synthesis

On the tail of Mentor’s transfer of Catapult C to Calypto, Synopsys, Inc. announced availability of the latest release of its Synplify Pro and Synplify Premier FPGA synthesis tools.
The company states that the new Synplify tool release enables engineers to build higher reliability into their FPGA designs through a new feature that provides automated creation and preservation of error-correction logic, including safe finite-state machines (FSMs). Additionally, an enhanced interface for the tool allows designers to track progress and analyze synthesis results hierarchically. For ASIC prototypers, support for Synopsys DesignWare Library MacroCell IP has been added, broadening DesignWare IP support and improving compatibility with Design Compiler.

Synopsys and Achronix Announce Multi-Year Renewal of Synthesis Partnership

Synopsys, Inc. and Achronix Semiconductor announced a multi-year extension of their OEM agreement for Synopsys FPGA synthesis tools. The agreement continues to make Synopsys' FPGA logic synthesis technology available to Achronix customers by expanding support of Synopsys' Synplify Pro® software to Achronix's latest generation of FPGAs, the 22 nanometer Speedster22i™ FPGA Platform. Achronix intends to deliver a Speedster22i FPGA-optimized version of Synplify Pro FPGA synthesis software to its customers as part of its Achronix CAD Environment (ACE) software package, to provide designers of these devices with high performance synthesis technology.

Catalupt C Changes Hands

In a move reminiscent of the style of Carl Icahn, Mentor lowered its costs by exchanging Catapult C with stock of Calypto. In this manner no money exchanged hands and Mentor lowered its development and maintenance costs in the very competitive area of High Level Synthesis (HLS). The move came as a surprise to those involved in the Catapult C project. Simon Block, even a couple of weeks ago had agreed to submit an article about the product for the August issue of Assembling The Future newsletter.

Xilinx Gets More Support From Both Mentor And Synopsys

Underlying the increased use of FPGA devices for large SoC designs, Xilinx is seeing a significant attention being paid to it by large EDA companies, like Synopsys and Mentor.

On the heels of the activities announced during DVCon Synopsys has announced support for the newer version of Xilinx's ISE with its Synplify Pro, Synplify Premier and Synphony synthesis products.

Synopsys Takes Big Steps in Prototyping Market

Synopsys took two major steps in the prototyping market segment during DVCon. First it released a new prototyping board, the HAPS-600 and then, the following day, it announced the release, in collaboration with Xilinx, of a FPGA-Based Prototyping Methodology Manual(FPMM). The product and the manual complement the family of virtual prototyping tools that Synopsys already offers. Thus software developers are now supported through the entire life of a prototype, enhancing the ability to develop embedded software in parallel with the SoC hardware. Synopsys plans to create a community of practicing prototyping engineers and users around the book.

Altera Unveils Process Technology Strategy for Its 28-nm Product Portfolio

Altera Corporation announced its 28-nm process technology strategy targeting its 28-nm product portfolio. In addition to the previously announced support for TSMC’s 28-nm High Performance (28HP) process technology for its high-end FPGA family, Altera will also utilize TSMC's 28-nm Low-Power (28LP) process technology for use in its low-cost and midrange product families. Leveraging two distinct process technologies in its 28-nm product portfolio enables Altera to provide customers a broad selection of optimized devices. Across high-end, midrange and low-cost products, Altera offers the optimal process technology to address customer needs.

Cadence and Xilinx Introduce FPGA IP Ecosystem Microsite

Cadence Design Systems, Inc. and Xilinx today introduced the new Xilinx IP Ecosystem microsite, a unified site meant to increase FPGA and ASIC designers' visibility to the latest IP supporting the Xilinx programmable platform. The microsite, developed as part of a broad initiative announced by Xilinx to transform and enable its ecosystem of third-party providers, is part of the ChipEstimate.com portal.

Synopsys Enhances Synplify FPGA Synthesis Software

Synopsys, Inc. announced the availability of enhancements to its Synplify Pro® and Synplify® Premier FPGA synthesis tools. The new features in the 2010.09 release shorten logic synthesis runtimes and enable faster post-netlist incremental design turns. Comprehensive support for Synopsys DesignWare® Library datapath and building blocks components enables the use of common RTL from prototype to production. In addition, a unique team-design interface allows geographically distributed teams to work on portions of the design in parallel, accelerating logic synthesis performance and improving the quality of results (QoR) of their design.

Mentor Graphics, GateRocket Collaborate on Solution for FPGA Verification

GateRocket, Inc announced a collaborative solution with Mentor Graphics® Corporation that streamlines the verification-through-synthesis flow for advanced FPGA design. The solution is especially well-tuned for developers of FPGAs targeting safety-critical applications in military and aerospace markets. It combines the performance and efficiency of GateRocket’s tool set for FPGA debug and verification with Mentor’s Precision Synthesis solution, a high-performance FPGA tool suite that is also the industry’s first rad-tolerant synthesis-based solution. In addition to new levels of performance and efficiency throughout the FPGA design process for any type of application, the integration allows designers to more efficiently verify and debug important high-reliability features such as synthesis-based triple modular redundancy (TMR) and compliance with safety-critical standards such as DO-254.