EVE has announced immediate availability of the e-zTest MIPI CSI-2 and e-zTest MIPI DSI validation platforms.
These two new wireless system-on-chip (SoC) validation platforms support the Mobile Industry Processor Interface (MIPI) Alliance wireless standards for Camera Serial Interface (CSI-2) and Display Serial Interface (DSI). They allow fast configuration of virtual cameras and virtual displays, along with an interface to a device under test (DUT) in the high-performance ZeBu SoC emulation system. The virtual test environment offers network accessibility of the design to any hardware or software engineer.
EVE today announced a variety of new software to expand the capabilities of its ZeBu system-on-chip (SoC) emulation platform, including power-aware verification, post-run debugging, two vertical application validation platforms, low-power and Flash memory models, and electronic system level (ESL) tool interfaces. "Today's emulation platforms have evolved into complex verification environments to address hardware/software integration and embedded software validation of large designs," remarks Luc Burgun, EVE's chief executive officer and president.
The pressure to improve the verificat5ion environment is growing. Very large designs enabled by continuous advances in semiconductors manufacturing as well as the acceptance of third party IP use has increased the difficulties faced by verification engineers. Recent product releases in the emulation and acceleration market, in particular from Mentor, and virtual prototyping from Synopsys, point to increased attention on the part of EDA vendors to this market.
Cadence Design Systems, Inc is announcing a new in-circuit acceleration based on the Incisive and Palladium XP platforms for the company’s System Development Suite, extensions to the Verification IP Catalog for acceleration and emulation, and new IP targeting full system design and verification to give engineers the ability to go beyond simulation to speed verification of large-scale SoCs, sub-systems and systems.
While attending the Globalpress Summit a couple of weeks ago, I heard Mentor Graphics announcement of the Veloce2 platform, the next-generation of emulation solutions for the verification of electronic system and Systems on Chip (SoC) designs. Built to accommodate up to two billion gate designs, the Veloce2 platform is expected to deliver twice the performance, twice the capacity and four times productivity gain in the same footprint and power consumption as the first-generation Veloce platform.
Mentor Graphics Corp. announced hardware and software solutions to accelerate the verification of Universal Serial Bus (USB) SuperSpeed (3.0) products. These new solutions, connected to a Veloce emulator, enable designers to test their USB SuperSpeed peripheral devices integrated on their System-on-Chip (SoC) designs, and to develop and test their software drivers and firmware prior to silicon availability.
Aldec, Inc. announced that the University of California, San Diego has adopted Aldec’s emulation and verification tools for their new and innovative Master of Advanced Studies (MAS) program in Wireless Embedded Systems. As part of the mutual agreement, Aldec will supply Riviera-PRO™ mixed-language RTL and gate-level simulation and HES™ emulation solutions to provide the master’s program with world class commercial EDA products.
Mentor Graphics Corp. announced its next-generation platform to accelerate the verification of 100-Gigabit Ethernet products. This new platform enables network equipment designers to test their complete system, including software and hardware, as well as employ real-world network traffic early in the development cycle-reducing the total system verification process. The platform consists of the Veloce® family of emulation products and the iSolveT Ethernet Switch product, which provides a cost-effective and efficient solution to verify multi-port, Ethernet-based designs, and dynamic, accurate verification of networking systems.
EVE Has released an enhanced design debugging capabilities for its ZeBu emulation platform. This capability uses a feature called Combinational Signal Access (CSA). It allows a ZeBu system to generate complete waveforms of the design. EVE aims to enhance productivity and lower the development costs.
EVE has just announced that the Japanese Customs Office has rendered a decision to reject Mentor Graphics’ application to suspend the importation of its best-in-class emulation systems.