Carbon Design Systems Inc. (http://www.carbondesignsystems.com), announced that it has previewed its newly released ARM Cortex-A57 Carbon Performance Analysis Kit (CPAK) at the Freescale Technology Forum.
IC Compiler II should not come as a surprise to those who have noticed the significant increase in complexity of design and verification in moving from 45 to 30 nm processes. If you, like me, have also defined as "diabolic" the cost and complexity of designing for 20 and 14 nm processes.
Pat Sheridan, Sr. PMM for Synopsys Platform Architect
Rich Collins, Sr. PMM ARC Processors and Subsystems
In response to my question: "What tools or methods do architects and developers have or should have to define a realistic power budget at the system level?" Pat and Rich offered the following article.
DVCon USA, or should I call it DVCon SV for Silicon Valley, has just concluded another successful year. The conference has grown significantly, and it compares favorably with other SV based conferences in our industry. It is now a must attend event for all professionals involved in design verification. On the heels of such growth Accellera Systems Initiative has announced the first European DVCon conference to be held this October in Munich Germany. I believe this is a suboptimal choice.
This week both Xilinx and Synopsys introduced new products. Xilinx is growing into a complete system company while Synopsys is benefitting from the acquired technology in hardware emulation to keep the competition in this sector very much alive. Taking advantage of the remote management capabilities built in all the latest computing platform, companies, not just governments, can now take a look at your activity on the web. So quit blaming the NSA alone, commercial reasons are an even bigger motivator to know what you are doing. Prakash Narain CEO of Real Intent released a point-of-view column in occasion of DVCon while Accellera's Day offers a birds-of-a-feather session organized around its Multi Language Working Group.
Interesting week in EDA as you can see from the items below. Good news from Synopsys, an interesting report on India, and two products announcements just in time for DVCon.
Every once in a while the topic of what the EDA industry should be resurfaces. In the last few weeks I have read ideas from Rick Carlson, Joe Costello and Chris Rowen. All three are seasoned, successful EDA personalities who are, mostly due to the lack of new funding in the industry, unhappy with EDA. Unfortunately all three must bear some of the blame, since they are part of the successful EDA entrepreneurs who made the industry what it is today.
A typical week in EDA. Speculations about IBM, another Synopsys acquisition, Google continues to diversify, TI gets more modern, Verific does what small companies are supposed to do, that is support standards, and Chip Design covers wearable technology. But it is IBM and Google that add spice to the news this week, or at least rumors about them.
Reviews of and opinions on what I think are the most interesting stories of this week.
This year the Phil Kaufman award committee has gone back to more traditional origins for its awardees: UC Berkeley. Dr. Chenming Hu will receive the award at this year's DAC conference in Austin Texas. The Phil Kaufman Award honors individuals who have had demonstrable impact on the field of EDA through technology innovations, education/mentoring, business or industry leaderships. The proximity of Silicon Valley and UC Berkeley is not a geographical accident, but an example of the synergy between business development and research.