GateRocket Inc. has significantly bolstered its technical, marketing, and sales acumen with the addition of two savvy and experienced chip design industry veterans. Jim Hogan, well-known EDA entrepreneur, investor, and executive has joined the GateRocket Advisory board; and Jim Wagner, with extensive EDA sales experience, has been named GateRocket Director of Sales.
Jay Vleeschhouwer authors a weekly research paper on the software industry. This week he covered both Cadence and Magma among other companies that do not serve the EDA industry. Some of the remarks about Cadence will sound familiar to those who either attended the EDAC CEO Panel, or Lip-Bu Tan's keynote speech at DVCon.
MUSIC provides an open forum for users to gain expertise using Magma's chip design software, and to exchange ideas about and solutions for the challenges of analog and integrated circuit and system-on-chip (SoC) designs.
Over the years MUSIC has become a leading venue for Magma users to gather, share and learn best practices and solutions. This year's program covers a range of Magma software capabilities including synthesis, placement and routing, floorplanning, library characterization, verification, circuit simulation and analog design. Users will share useful tips on how to leverage Magma software to improve results, reduce power, minimize costs and increase productivity.
Atego, an independent supplier of modeling and development tools for complex, mission and safety-critical embedded systems and software has acquired Blue River Software GmbH, extending its embedded development software portfolio to now include C++ tools. Atego's acquisition of Blue River closely follows its creation from the recent merger between Artisan Software Tools and Aonix.
The annual CEO forecast included the gang of the big three -- Aart de Geus of Synopsys, Lip-Bu Tan of Cadence, and Wally Rhines of Mentor Graphics -- plus John Kibarian of PDF Solutions as the CEOs and Jay Vleeschhouwer from Ticonderoga Securities as the dominating moderator.
Magma Design Automation Inc. reported revenue of $31.0 million for its fiscal 2010 third quarter ended Jan. 31, 2010, above the company’s guidance range of $29.5 million to $30.0 million. Third-quarter revenue increased 1 percent from the $30.7 million reported for the year-ago third quarter ended Feb. 1, 2009.
D2S announced its new design for e-beam (DFEB) mask technology for the production of advanced optical photomasks with circular and curvilinear shapes. Used in conjunction with currently available e-beam mask writing equipment, D2S DFEB mask technology reduces the write times for masks containing complex or curvilinear features to enable the extension of 193-nm immersion lithography to the 22-nm node and beyond with practical turnaround time, the company claims.
The eBeam Initiative, a forum dedicated to the education and promotion of a new design-to-manufacturing approach known as design for e-beam (DFEB), today announced that six additional companies spanning the entire semiconductor value chain have joined the Initiative to support the new DFEB mask roadmap for high-volume applications. The roadmap incorporates new innovations to e-beam mask making using DFEB in conjunction with e-beam mask writing equipment currently on the market. Leading mask manufacturers, mask-writing equipment manufacturers, integrated device manufacturers (IDMs), foundries, as well as lithography experts, have joined the 21 founding members.
Dialog Semiconductor plc announced that the company is working closely with foundry partner Taiwan Semiconductor Manufacturing Company (TWSE: 2330, NYSE: TSM) on a bipolar-CMOS-DMOS (BCD) technology specifically tailored to high-performance power management ICs for portable devices.
The 0.25-micron high-voltage process node enables higher voltage functionality to be integrated efficiently into single chip power management ICs, increasing cost efficiencies and expanding the addressable market for Dialog solutions.
Jasper Design Automation announced it is working with France’s EASii IC, a well-known European electronic-design consulting company, to accelerate the adoption of formal verification methods and increase understanding of how they apply across the entire spectrum of chip design, from architecture to signoff, with its customers.
EASii IC becomes the newest member of JasperLinks which creates comprehensive solutions integrating Jasper formal verification with other EDA solutions and services in the SoC flow. JasperLinks is open to companies in the design ecosystem including IP vendors, design services firms and consultants, and EDA partners.