Gabe on EDA

February 4, 2008, San Francisco, CA—The International Solid State Circuits Conference (ISSCC) opened with a series of plenary presentations. One talk by Mike Muller, CTO of ARM entitled “Embedded Processing at the Heart of Life and Style” looked at the trade off between performance, power, and die area.

The challenges in design are exacerbated by the rising costs and risks of the designs. Managers are looking for any ways to de-risk the design process. One way to address the problem is to use more external IP. The costs of microprocessor development is rising at an exponential rate for each generation, the knowledge base and costs are spread across the entire industry when many users take advantage of the expertise embedded in this IP. The IP vendor will invest millions of dollars to develop the IP and deliver robust solutions. For example, ARM invested $500 M to develop the ARM 11 and Cortex families. If companies created their own processors, their aggregate investment would exceed $11 B for this type of microprocessor. By creating this IP family, ARM has not only saved the industry a lot of investment and engineering duplication, but also has helped to reduce the risk of the processor-based designs.

Venice, Florida Nov. 13 -- Synopsys, Inc. today announced that Taiwan Semiconductor Manufacturing Company Ltd. successfully implemented Synopsys' new PCX technology to reduce design-to-mask cycle-time for its advanced process technologies. Proteus-CATS® data eXchange (PCX) technology is a highly scalable parallel interface technology designed to reduce data communication overhead and turnaround time between Synopsys' Proteus optical proximity correction (OPC) and CATS mask data preparation (MDP) software. The advantage of TSMC's in-house mask services can be further enhanced by shortening the mask making cycle time, which will be difficult for the merchant maskshops to match.

(Editor Note) I received this press release as an unsolicited email message and thought you might like to read it.

Is Your Grass The Greenest? 16 (Cost-Effective) Ways To Grow A Company Culture That Helps You Keep Your Keepers.

In today's highly competitive business world, your employees have a lot of options. KEYGroup's Joanne Sujansky shares some innovative ideas on how to keep them from seeking greener pastures—without breaking the bank.

Pittsburgh, PA (August 2007)—Employees matter. No, they really matter. In fact, as the forces of globalism and the proliferation of technology relentlessly level the proverbial playing field, it's safe to say that the men and women who work for you are everything. Think about it. Your competitors have access to the exact same resources as you. That means infinite choices exist not only for your customers, but for your employees as well. According to Joanne G. Sujansky, Ph.D, CSP, if you're not seeking ways to nurture them and meet their needs, they will seek greener pastures—and your customers will follow them over the fence.

Simon Napper, CEO, Synfora, Inc.

Is ANSI C or SystemC the best language for electronic system level (ESL)? The debate rages but EDA language wars almost never reach a conclusion. We all want a single language for every stage of the design, but the range of systems make this unlikely. Instead of an ESL Esperanto, multiple languages have been developed that need to co-exist and interoperate for the many aspects of integrated circuit (IC) design and verification. The language debate seldom defines its scope, and rarely gives specific examples of where a particular language can be used. You must define the area you are working in, before you can decide which language is best.

The EDAC Market Statistics Survey (MSS) data for PCB reflect interesting trends. Starting in Q4 1999, and extending through the second quarter of 2001, PCB tool licenses and maintenance revenues jumped as the board industry entered a major tool replacement cycle. During this period, board manufacturers found that the previous generation of tools were incapable of meeting the requirements of the latest generation semiconductor processes. Boards and systems makers got sucked into the faster, smaller, sooner development cycles and found that the older tools didn't have all of the required functions. For example, a large Midwestern industrial controls company, whose products have cycle times measured in multiple seconds, found that their latest generation boards didn't work because the components on the board created noise and interference due to the very high-speed edge rates.

Venice, Florida — Victor Berman, Chair of the IEEE Design Automation Standard Committee (DASC) and President and CEO of Improv Systems, has announced that the membership of the DASC has approved the Project Authorization Request (PAR) to develop a low power format standard for use by the EDA industry. The DASC, as a standard development body, operates under the IEEE Standards Association (IEEE-SA). The favorable vote clears the way for the Low-Power study group to form a Working Group and develop a standard once the IEEE-SA New Standards Committee (NesCom) approves the PAR. NesCom members are experts in various disciplines in the electronics industry. The committee sanctions all new standard development work and monitors the progress of the respective Working Groups

In an invited talk at the International Symposium on Asynchronous Circuits and Systems, James Kajiya from Microsoft Research talked about "Signaling with conserved Quantities: Two Realizations in CMOS and Superconducting Flux Quantum Logic".

Kajiya is advocating a change from the practices of signaling with current flow to signaling with conserved quantities to address the MOS heat issue. Power consumption is becoming everyone's "hot" issue, even though the problem was identified in the early '80's. Everyone knows that mobile products need to operate at ambient temperature, since the total power budget cannot afford any high volume cooling devices.

February 12, 2007—San Francisco—The International Solid State Circuits Conference started with a plenary talk from Lewis Counts, vice president of Analog Devices. His talk titled "Analog and mixed signal innovation: the process-circuit-system-application interaction", looked at some of the trends in analog design.

The ITRS '05 noted that increased functionality supersedes the capabilities available from scaling. Analog and mixed signal designs are areas for expansion, especially since the focus is not on making chips but on improving users' experience. At the interface levels, system performance is independent of technology, which should lead towards more system in package solutions.

The Electronic Design Automation Consortium (EDAC) received some criticism over the last twelve months from Michael Santarini, a journalist who has covered the EDA industry for some years first for CMP ( the publisher of EDA DesignLine and many other industry publications both in print and electronic form), and lately for EDN. Mr. Santarini has questioned the inclusion of Intellectual Property (IP) revenue in the total revenue for EDA, and accused EDAC of "cherry picking" by inflating said revenue by including companies that are not members of EDAC in the total. The accusations were prompted by the contents of the 2006 report of the Market Statistics Service (MSS), a publication that EDAC has issued for many years as a service to its members.

Having been a long-time DVCon attendee (even back in the “HDLCon” days) and presenter even before becoming the Technical Program Chair, I continue to be impressed with how the technical papers so accurately reflect the current state-of-the-art, and future trends, of the design and verification industry. Now, some may argue that this is a bit of a “chicken-and-egg” situation, but I’ve always believed that the major value of a conference like DVCon is the unique opportunity it affords for engineers to learn from each other about emerging techniques and new technologies. In some cases, the most valuable lessons actually may be about what not to do.